Software Listing: Hdl
- Compare with hand coding and auto code generation of HDL
- License: Freeware
- Price: 0.00
This presentation introduces comparing between the hand coding and auto code generation with Simulink HDL.It uses simple communications models to mention merit/demerit. Additionally,The frame synchronization explained by the book was designed with Stateflow.The figure which is in the book and Statefow model are very similar.You can assume the book to be specifications.You can confirm the link function between specifications and the Simulink model and the coverages of the verification. Moreover, there are examples of modeling to generate the code which conforms to STARC. These are models by which the person who wants to use Simulink HDL Coder can confirm the main function hereafter.
- Publisher: Akemi
- Date: 25-05-2013
- Size: 10 KB
- Platform: Matlab, Scripts
- HDL Coder Compatible edge detector
- License: Shareware
There is not "built-ib" Simulink block that is HDL Coder compatible negative or positive edge detectors. Attached are 2 subsystems based on basic logic elements, giving you the Simulink HDL Coder compatible edge detection..
- Publisher: Igal
- Date: 06-05-2013
- Size: 10 KB
- Platform: Matlab, Scripts
- myHDL - HDL Health App
- License: Freeware
- Price: 0.00
The free myHDL app can help you make the most of your Health Diagnostic Laboratory, Inc. (HDL, Inc.) advanced lab test results and get on track with your health. Use this app to help monitor your health, increase your overall health awareness, and “turn your reds to greens.” Connect with others who have had the advanced lab test, get support, find answers to your questions, and more.
Note: The myHDL app is intended for informational and educational purposes only. Please consult with your health care provider or doctor on any matters related to your health.
FEATURES
Lab Reports - Our comprehensive, advanced lab results have been optimized for viewing on a mobile device.
- Publisher: Health Diagnostic Laboratory, Inc.
- Date: 05-02-2015
- Size: 22528 KB
- Platform: Android 2.x, Android 3.x, Android 4.4, Android 4.x
- Rimu Schematic
- License: Shareware
- Price: 59.00
Rimu Schematic is professional quality electronic schematic capture software, designed for ease of use. Rimu Schematic follows familiar concepts and commands used in many other Windows applications.
Presentation quality schematics - make a good impression on your employer or customers.
Spice deck - run simulations of your schematic in any Spice compatible simulator.
Abel and CUPL HDL - program PLDs by drawing the internal logic as a schematic.
PCB Netlist - import into your PCB layout software for error-free PCB layout.
Bill of Materials - import directly into your spreadsheet program.
- Publisher: Hutson Systems
- Date: 03-02-2011
- Size: 2056 KB
- Platform: Win2000, WinOther
- dvi_enc
- License: Freeware
- Price: 0.00
The dvi_enc is an example of implementation to Xilinx Spartan3A FPGA of the DVI encoder algorithm. It's written by Verilog HDL. And, the implementation supports XGA video mode..
- Publisher: dvienc.sourceforge.net
- Date: 16-08-2012
- Size: 284 KB
- Platform: WinOther
- Elphel reconfigurable cameras
- License: Freeware
- Price: 0.00
Software and HDL code for Elphel reconfigurable network cameras.
- Publisher: .elphel.com
- Date: 10-05-2012
- Size: 4122 KB
- Platform: Linux, Mac OS X, WinOther
- Fminus
- License: Freeware
- Price: 0.00
F- is an ANSish Forth that uses a VM generator to compile Forth into C-based VM suitable for living in a C-based (or assembly or HDL) microcontroller project. The VM supplies 32-bit math, I/O, multitasking and debugger in a ROM footprint as small as 4kB..
- Publisher: fminus.sourceforge.net
- Date: 10-06-2012
- Size: 577 KB
- Platform: WinOther
- FSMDesigner
- License: Freeware
- Price: 0.00
FSMDesigner4 is a C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. FSMDesigner4 uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits..
- Publisher: ra.ziti.uni-heidelberg.de
- Date: 10-08-2012
- Size: 1988 KB
- Platform: Linux, WinOther
- HDLObf
- License: Freeware
- Price: 0.00
HDLObf is intended to be a HDL Obfuscator and identifier name change utility. Primarily designed for Verilog/SystemVerilog support will be added for VHDL/SystemC in future..
- Publisher: hdlobf.sourceforge.net
- Date: 06-11-2012
- Size: 143 KB
- Platform: Linux, Mac OS X, WinOther
- Icarus Verilog
- License: Freeware
- Price: 0.00
Icarus Verilog is an open source Verilog compiler that supports the IEEE-1364 Verilog HDL including IEEE1364-2005 plus extensions..
- Publisher: iverilog.icarus.com
- Date: 25-08-2012
- Size: 1184 KB
- Platform: Linux, Mac OS X, Unix, WinOther
- IVI
- License: Freeware
- Price: 0.00
IVI is a graphical, interactive user-interface to various Open-Source HDL simulators. IVI is transitioning to using the Eclipse application framework..
- Publisher: ivi.sourceforge.net
- Date: 07-07-2012
- Size: 3328 KB
- Platform: Linux, WinOther
- Logic Circuit Simulation in C++
- License: Freeware
- Price: 0.00
libLCS is a hardware description library in C++ aiming to be as powerfull and easy as the Verilog HDL. It currently supports logic gates, flipflops, clock, and facilitates delays, continuous assignments and variable value dumping into VCD files..
- Publisher: liblcs.sourceforge.net
- Date: 08-06-2012
- Size: 1255 KB
- Platform: WinOther
- OpenVGA
- License: Freeware
- Price: 0.00
OpenVGA is an free and open FPGA-based implementation of a VGA compatible graphics adapter, and utilising low-cost hardware. The project includes the PCB schematic and artwork, Verilog HDL, firmware assembly code, and driver source code..
- Publisher: elec.otago.ac.nz
- Date: 15-10-2012
- Size: 4325 KB
- Platform: WinOther
- PHDL
- License: Freeware
- Price: 0.00
An HDL that models schematics for PCB's and outputs a netlist for use in PADS Layout and other similar tools..
- Publisher: phdl.sourceforge.net
- Date: 03-09-2012
- Size: 3058 KB
- Platform: WinOther
- Reed-Solomon Core Compiler
- License: Freeware
- Price: 0.00
RSTK is a C language program that generates Reed-Solomon HDL source code modules that can be compiled and synthesized using standard VHDL or Verilog compilers and synthesis tools..
- Publisher: rstk.sourceforge.net
- Date: 19-07-2012
- Size: 174 KB
- Platform: Linux, Unix, WinOther
- sc2vhdl
- License: Freeware
- Price: 0.00
s2vhdl extracts structural information from SystemC HDL programs. The output is in VHDL code and graphical diagrams. GCC compiler is used as a C++ frontend..
- Publisher: sc2vhdl.sourceforge.net
- Date: 10-05-2012
- Size: 1147 KB
- Platform: Linux
- sister
- License: Freeware
- Price: 0.00
Sister is high-level synthesizer for SoC design . It analyzes SystemC(based on C++ language) source code and creates Verilog HDL source code..
- Publisher: sister.sourceforge.net
- Date: 01-10-2012
- Size: 152 KB
- Platform: Linux
- Estimate LDL cholesterol
- License: Shareware
Estimate LDL cholesterol based on measured total cholesterol (TC), HDL, and triglycerides (TG). The function 'estimateLDL(TC, HDL, TG, InputUnits)' provides an estimate for the LDL cholesterol on measured total cholesterol (TC), HDL cholesterol, and triglycerides (TG). For most cases, the classical formula by Friedewald, Levy, and Fredrickson dated back to 1972 [1] (usually called the Friedewald formula) is used. For low triglycerides, the recent (2008) formula by Ahmadi et al. [2] is used. INPUT: TC - total measured cholesterol as listed in the blood test, HDL - measured HDL cholesterol as listed in the blood test, TG - total triglycerides as listed in the blood test, InputUnits - 'conventional' (mg/dL) or 'SI' (mmol/L).
- Publisher: Igor Podlubny
- Date: 20-02-2013
- Size: 10 KB
- Platform: Matlab, Scripts
- HDL-IP-Cores
- License: Freeware
- Price: 0.00
Platform for advanced open source IP-Core development, i. e. dynamic memory controllers for FPGAs.
HDL-IP-Cores License - BSD License.
- Publisher: Hdl-ip-cores
- Date:
- Platform: WinOther
